#include "global.h"#include <cstring>#include "x86dasm.h"#include "x86istr.h"#include "x86table.h"#include "utils/compilecheck.hpp"Go to the source code of this file.
Defines | |
| #define | U8TOI(num) (((num)^0x80)-0x80) |
| #define | U16TOI(num) (((num)^0x8000)-0x8000) |
| #define | IsRelocation(addr) (reloc.GetRelocation(addr)!=NULL) |
| #define | SUCC(n, m) (REG(n)+1) == REG(m) |
| #define | _REAL_GETREGS(n, m) ((reg_t)(REG(al)+(((n)*8)+(m)))) |
| #define | _REAL_GETSEGREGS(n) ((reg_t)(REG(es)+(n))) |
| #define | _REAL_GETFPREGS(n) ((reg_t)(REG(st0)+(n))) |
| #define | _REAL_GETCTRLREGS(n, m) ((reg_t)(REG(cr0)+(((n)*8)+(m)))) |
| #define | GETREGS(n, m) _REAL_GETREGS(n,m) |
| #define | GETSEGREGS(n) _REAL_GETSEGREGS(n) |
| #define | GETFPREGS(n) _REAL_GETFPREGS(n) |
| #define | GETCTRLREGS(n, m) _REAL_GETCTRLREGS(n,m) |
| #define | INSTPROCDECL(name) int InstructionDecoder::name(InstructionDecoder* _this, uchar opcode, int special, Instruction& instruction) |
Functions | |
| COMPILE_CHECK (iRegCheck, SUCC(al, cl)&&SUCC(cl, dl)&&SUCC(dl, bl)&&SUCC(bl, ah)&&SUCC(ah, ch)&&SUCC(ch, dh)&&SUCC(dh, bh)&&SUCC(bh, ax)&&SUCC(ax, cx)&&SUCC(cx, dx)&&SUCC(dx, bx)&&SUCC(bx, sp)&&SUCC(sp, bp)&&SUCC(bp, si)&&SUCC(si, di)&&SUCC(di, eax)&&SUCC(eax, ecx)&&SUCC(ecx, edx)&&SUCC(edx, ebx)&&SUCC(ebx, esp)&&SUCC(esp, ebp)&&SUCC(ebp, esi)&&SUCC(esi, edi)&&SUCC(edi, mm0)&&SUCC(mm0, mm1)&&SUCC(mm1, mm2)&&SUCC(mm2, mm3)&&SUCC(mm3, mm4)&&SUCC(mm4, mm5)&&SUCC(mm5, mm6)&&SUCC(mm6, mm7)&&SUCC(mm7, xmm0)&&SUCC(xmm0, xmm1)&&SUCC(xmm1, xmm2)&&SUCC(xmm2, xmm3)&&SUCC(xmm3, xmm4)&&SUCC(xmm4, xmm5)&&SUCC(xmm5, xmm6)&&SUCC(xmm6, xmm7)) | |
| COMPILE_CHECK (segRegCheck, SUCC(es, cs)&&SUCC(cs, ss)&&SUCC(ss, ds)&&SUCC(ds, fs)&&SUCC(fs, gs)) | |
| COMPILE_CHECK (fpRegCheck, SUCC(st0, st1)&&SUCC(st1, st2)&&SUCC(st2, st3)&&SUCC(st3, st4)&&SUCC(st4, st5)&&SUCC(st5, st6)&&SUCC(st6, st7)) | |
| COMPILE_CHECK (controlRegCheck, SUCC(cr0, cr1)&&SUCC(cr1, cr2)&&SUCC(cr2, cr3)&&SUCC(cr3, cr4)&&SUCC(cr4, cr5)&&SUCC(cr5, cr6)&&SUCC(cr6, cr7)&&SUCC(cr7, dr0)&&SUCC(dr0, dr1)&&SUCC(dr1, dr2)&&SUCC(dr2, dr3)&&SUCC(dr3, dr4)&&SUCC(dr4, dr5)&&SUCC(dr5, dr6)&&SUCC(dr6, dr7)&&SUCC(dr7, tr0)&&SUCC(tr0, tr1)&&SUCC(tr1, tr2)&&SUCC(tr2, tr3)&&SUCC(tr3, tr4)&&SUCC(tr4, tr5)&&SUCC(tr5, tr6)&&SUCC(tr6, tr7)) | |
| reg_t | get_regnum (int reg) |
| void | inst_init () |
| INSTPROCDECL (stub) | |
| INSTPROCDECL (conv_byte) | |
| INSTPROCDECL (one_byte) | |
| INSTPROCDECL (two_byte) | |
| INSTPROCDECL (five_byte) | |
| Param::MemoryTypes | RegSizeToMemType (int reg_size) |
| INSTPROCDECL (in_out) | |
| INSTPROCDECL (enter) | |
| INSTPROCDECL (disp8) | |
| INSTPROCDECL (wait) | |
| INSTPROCDECL (prefix) | |
| INSTPROCDECL (adrsize_over) | |
| int | mod3 (uchar r_m, int size, Param ¶m) |
| INSTPROCDECL (mod_reg) | |
| INSTPROCDECL (group1) | |
| INSTPROCDECL (k6_3dnow) | |
Variables | |
| int | segment_mode = 386 |
| int | segment_bytes = 4 |
| bool | p3enable = true |
| bool | k6_3DNow_enable = true |
| bool | k6_en_3DNow_enable = true |
| bool | athlon_enable = true |
| const reg_t | addr_mode2 [8][2] |
| const int | op_grp [16][8] |
| const int | rm_size_invalid = 5 |
| int | over_seg = -1 |
| bool | over_opsize = false |
| bool | over_adrsize = false |
| bool | size_large = true |
| bool | addr_large = true |
| int | size_bytes = 4 |
| int | addr_bytes = 4 |
|
|
Definition at line 94 of file x86dasm.cpp. |
|
|
Definition at line 93 of file x86dasm.cpp. |
|
|
Definition at line 91 of file x86dasm.cpp. |
|
|
Definition at line 92 of file x86dasm.cpp. |
|
|
Definition at line 125 of file x86dasm.cpp. |
|
|
Definition at line 124 of file x86dasm.cpp. |
|
|
Definition at line 122 of file x86dasm.cpp. Referenced by InstructionDecoder::do_sib(), get_regnum(), INSTPROCDECL(), InstructionDecoder::mod0(), InstructionDecoder::mod1(), InstructionDecoder::mod2(), mod3(), and InstructionDecoder::mod_reg2(). |
|
|
Definition at line 123 of file x86dasm.cpp. Referenced by get_regnum(). |
|
|
Definition at line 240 of file x86dasm.cpp. |
|
|
Definition at line 40 of file x86dasm.cpp. Referenced by InstructionDecoder::get_checkc(). |
|
|
Definition at line 60 of file x86dasm.cpp. |
|
|
Definition at line 38 of file x86dasm.cpp. |
|
|
Definition at line 37 of file x86dasm.cpp. Referenced by InstructionDecoder::mod1(), and InstructionDecoder::mod_reg2(). |
|
||||||||||||
|
|
|
||||||||||||
|
|
|
||||||||||||
|
|
|
||||||||||||
|
|
|
|
Definition at line 169 of file x86dasm.cpp. References GETREGS, GETSEGREGS, and reg_t. Referenced by INSTPROCDECL().
00170 {
00171 if ( reg < 9 ) /* Byte sized half register */
00172 return GETREGS(0,reg-1);
00173
00174 if ( reg < 17 ) /* Word/DWord sized general register */
00175 {
00176 if ( size_large )
00177 return GETREGS(2,reg-9);
00178 return GETREGS(1,reg-9);
00179 }
00180
00181 return GETSEGREGS(reg-17);
00182 }
|
|
|
Definition at line 185 of file x86dasm.cpp. References addr_bytes, addr_large, over_adrsize, over_opsize, over_seg, segment_bytes, segment_mode, size_bytes, and size_large.
00186 {
00187 over_seg = -1; /* Setup for the next instruction */
00188 over_opsize = false;
00189 over_adrsize = false;
00190
00191 if ( segment_mode == 386 ) {
00192 size_large = true;
00193 addr_large = true;
00194 } else {
00195 size_large = false;
00196 addr_large = false;
00197 }
00198 size_bytes = segment_bytes;
00199 addr_bytes = segment_bytes;
00200 }
|
|
|
Definition at line 1799 of file x86dasm.cpp. References _PRG_ASSERT, k6_3DNow_enable, k6_en_3DNow_enable, and modregPqQq.
01800 {
01801 _PRG_ASSERT(special == modregPqQq);
01802 if (!k6_3DNow_enable)
01803 return 0;
01804
01805 uint32_t mod_reg;
01806 if ( _this->get_checkc( &mod_reg ) )
01807 return 0;
01808
01809 int result = _this->mod_reg2( opcode,special,mod_reg, instruction);
01810
01811 // read opcode suffix
01812 if ( result == 0 || _this->get_checkc( &mod_reg ) )
01813 {
01814 return 0;
01815 }
01816 _PRG_ASSERT(mod_reg < 256);
01817
01818 // get instruction
01819 instruction.instruction = k6_3DNow_instr[mod_reg].instruction;
01820 if ( instruction.instruction == -1 )
01821 return 0;
01822
01823 // check for enhanched enabled
01824 if ( mod_reg == 0xBB || (mod_reg&0xF) == 0xC || (mod_reg&0xF9) == 0x80 )
01825 {
01826 _PRG_ASSERT( mod_reg==0xBB || mod_reg==0x8A || mod_reg==0x8E || mod_reg==0x0C || mod_reg==0x1C );
01827 if (!k6_en_3DNow_enable)
01828 return 0;
01829 }
01830
01831 return 1+result;
01832 }
|
|
|
Definition at line 1372 of file x86dasm.cpp. References op_grp.
01373 {
01374 uint32_t mod_reg;
01375 if ( _this->get_checkc( &mod_reg ) )
01376 return 0;
01377
01378 instruction.instruction = op_grp[0][(uchar)((mod_reg & 0x38) >> 3)];
01379 return _this->mod_reg2( opcode,special,mod_reg, instruction);
01380 }
|
|
|
Definition at line 1240 of file x86dasm.cpp.
01241 {
01242 uint32_t mod_reg;
01243 if ( _this->get_checkc( &mod_reg ) )
01244 return 0;
01245
01246 return _this->mod_reg2( opcode,special,mod_reg, instruction);
01247 }
|
|
|
Definition at line 826 of file x86dasm.cpp. References addr_bytes, addr_large, and over_adrsize.
00827 {
00828 int valid;
00829 int save_bytes;
00830 bool save_large;
00831
00832 save_large = addr_large;
00833 save_bytes = addr_bytes;
00834
00835 if (!over_adrsize)
00836 {
00837 addr_large = !addr_large; /* Toggle address */
00838 if ( addr_bytes == 2 ) {
00839 addr_bytes = 4;
00840 } else {
00841 addr_bytes = 2;
00842 }
00843 over_adrsize = true;
00844 }
00845
00846 valid = _this->check_forward( instrTable, instruction );
00847
00848 addr_large = save_large;
00849 addr_bytes = save_bytes;
00850 over_adrsize = false;
00851
00852 if ( valid )
00853 return( valid+1 );
00854 else
00855 return( 0 );
00856 }
|
|
|
Definition at line 712 of file x86dasm.cpp.
00713 {
00714 // !!! should verify next instruction
00715 instruction.numArg = 0;
00716 return 1;
00717 }
|
|
|
Definition at line 702 of file x86dasm.cpp.
00703 {
00704 // !!! always print instruction
00705 instruction.numArg = 0;
00706 return 1;
00707 }
|
|
|
Definition at line 638 of file x86dasm.cpp. References addr_bytes, Param::Literal, and uchar.
00639 {
00640 uint32_t offset;
00641 uint32_t dest;
00642
00643 // if ( over_seg != -1 ) { /* No segment overide allowed */
00644 // return( 0 );
00645 // }
00646
00647 instruction.numArg = 1;
00648
00649 // !!! check relocation
00650 offset = _this->reader->ReadByte();
00651
00652 // if ( offset == 0xFFFFFFFFL ) { /* This would generate a label in */
00653 // return( 0 ); /* the middle of the jmp statement */
00654 // } /* thereby preventing it anyway */
00655
00656 dest = _this->reader->Tell() + (signed char)offset;
00657
00658 instruction.Args[0] =
00659 Param(Param::Literal,dest,(uchar)addr_bytes);
00660
00661 return 2;
00662 }
|
|
|
Definition at line 594 of file x86dasm.cpp. References _PRG_ASSERT, Param::Literal, and uchar.
00595 {
00596 uint32_t num_bytes;
00597 uint32_t nest_level;
00598
00599 // !!! check for no relocation
00600 num_bytes = _this->reader->ReadWord();
00601
00602 if ( _this->get_checkc( &nest_level) )
00603 return 0;
00604
00605 instruction.numArg = 2;
00606 _PRG_ASSERT(instruction.instruction == istr_enter);
00607
00608 instruction.Args[0] = Param(Param::Literal,num_bytes, (uchar)2);
00609 instruction.Args[1] = Param(Param::Literal,nest_level,(uchar)1);
00610 return 4;
00611 }
|
|
|
Definition at line 488 of file x86dasm.cpp. References _PRG_ASSERT, dx, GETREGS, REG, Param::Registry, and size_large.
00489 {
00490 int dir;
00491 int size;
00492
00493 instruction.numArg = 2;
00494
00495 dir = ( opcode & 0x02 ) >> 1;
00496 size = ( opcode & 0x01 );
00497
00498 if ( size == 1 && size_large )
00499 size = 2;
00500
00501 if ( dir == 0 )
00502 {
00503 _PRG_ASSERT(size>=0 && size<=2);
00504 instruction.Args[0] =
00505 Param(Param::Registry,GETREGS(size,0));
00506 instruction.Args[1] =
00507 Param(Param::Registry,REG(dx));
00508 } else {
00509 instruction.Args[0] =
00510 Param(Param::Registry,REG(dx));
00511 _PRG_ASSERT(size>=0 && size<=2);
00512 instruction.Args[1] =
00513 Param(Param::Registry,GETREGS(size,0));
00514 }
00515
00516 return 1;
00517 }
|
|
|
Definition at line 353 of file x86dasm.cpp. References Param::FarLiteral, size_bytes, size_large, and uchar.
00354 {
00355 uint32_t offset;
00356 uint32_t segment;
00357 int data_size;
00358
00359 // if ( over_seg != -1 ) { // No segment overide allowed
00360 // return(0);
00361 // }
00362
00363 data_size = size_bytes;
00364
00365 // !!! check relocation
00366 offset = _this->ReadVar( size_large );
00367 segment = _this->reader->ReadWord();
00368
00369 instruction.numArg = 1;
00370 instruction.Args[0] =
00371 Param(Param::FarLiteral,offset,(uchar)data_size,segment);
00372
00373 return( 3 + data_size );
00374 }
|
|
|
Definition at line 281 of file x86dasm.cpp. References get_regnum(), Param::Literal, Param::Registry, regNone, and uchar.
00282 {
00283 uint32_t offset;
00284
00285 if ( _this->get_checkc( &offset ) ) {
00286 return( 0 );
00287 }
00288
00289 instruction.numArg = 1;
00290 if (special != regNone)
00291 {
00292 instruction.numArg = 2;
00293 instruction.Args[0] = Param(Param::Registry,get_regnum(special));
00294 }
00295
00296 // unsigned byte
00297 instruction.Args[instruction.numArg-1] = Param(Param::Literal,offset,(uchar)1);
00298
00299 return 2;
00300 }
|
|
|
Definition at line 267 of file x86dasm.cpp. References get_regnum(), Param::Registry, and regNone.
00268 {
00269 instruction.numArg = 0;
00270 if (special != regNone)
00271 {
00272 instruction.numArg = 1;
00273 instruction.Args[0] = Param(Param::Registry,get_regnum(special));
00274 }
00275 return 1;
00276 }
|
|
|
Definition at line 255 of file x86dasm.cpp. References _PRG_ASSERT.
00256 {
00257 _PRG_ASSERT( opcode == 0x98 || opcode == 0x99 );
00258 instruction.numArg = 0;
00259 if ( size_large )
00260 instruction.instruction = special;
00261 return 1;
00262 }
|
|
|
Definition at line 247 of file x86dasm.cpp.
00248 {
00249 return 0;
00250 }
|
|
||||||||||||||||
|
Definition at line 953 of file x86dasm.cpp. References GETREGS, Param::Registry, and uchar. Referenced by InstructionDecoder::do_mod_rm().
00954 {
00955 if (unsigned(size)>4u) // 0-4 valid
00956 return -1;
00957 param = Param(Param::Registry,GETREGS(size,r_m));
00958 return 0;
00959 }
|
|
|
Definition at line 419 of file x86dasm.cpp. References _PRG_ASSERT, Param::memInt8, Param::memMmx, Param::memNone, Param::MemoryTypes, and Param::memXmm. Referenced by InstructionDecoder::mod_reg2().
00420 {
00421 switch (reg_size)
00422 {
00423 case 0: return Param::memInt8;
00424 case 1: return Param::memInt16;
00425 case 2: return Param::memInt32;
00426 case 3: return Param::memMmx;
00427 case 4: return Param::memXmm;
00428 default:
00429 _PRG_ASSERT(0);
00430 return Param::memNone;
00431 }
00432 }
|
|
|
Definition at line 166 of file x86dasm.cpp. Referenced by InstructionDecoder::Decode(), inst_init(), INSTPROCDECL(), InstructionDecoder::mod0(), and InstructionDecoder::mod2(). |
|
|
Definition at line 164 of file x86dasm.cpp. Referenced by InstructionDecoder::Decode(), inst_init(), INSTPROCDECL(), InstructionDecoder::mod0(), and InstructionDecoder::mod2(). |
|
|
Initial value: {
{ REG(bx),REG(si) },
{ REG(bx),REG(di) },
{ REG(bp),REG(si) },
{ REG(bp),REG(di) },
{ REG(si),null_reg },
{ REG(di),null_reg },
{ REG(bp),null_reg },
{ REG(bx),null_reg }
}Definition at line 128 of file x86dasm.cpp. Referenced by InstructionDecoder::mod0(), InstructionDecoder::mod1(), and InstructionDecoder::mod2(). |
|
|
Definition at line 53 of file x86dasm.cpp. |
|
|
Definition at line 49 of file x86dasm.cpp. Referenced by INSTPROCDECL(). |
|
|
Definition at line 51 of file x86dasm.cpp. Referenced by INSTPROCDECL(). |
|
|
Initial value: {
{ istr_add, istr_or, istr_adc, istr_sbb, istr_and, istr_sub, istr_xor, istr_cmp },
{ istr_rol, istr_ror, istr_rcl, istr_rcr, istr_shl, istr_shr, -1, istr_sar },
{ istr_test, -1, istr_not, istr_neg, istr_mul, istr_imul, istr_div, istr_idiv },
{ istr_inc, istr_dec, -1, -1, -1, -1, -1, -1 },
{ istr_inc, istr_dec, istr_call, istr_call, istr_jmp, istr_jmp, istr_push, -1 },
{ istr_sldt, istr_str, istr_lldt, istr_ltr, istr_verr, istr_verw, -1, -1 },
{ istr_sgdt, istr_sidt, istr_lgdt, istr_lidt, istr_smsw, -1, istr_lmsw,istr_invlpg },
{ -1, -1, -1, -1, istr_bt, istr_bts, istr_btr, istr_btc },
{ -1, istr_cmpxchg8b, -1, -1, -1, -1, -1, -1 },
{ -1, -1, -1, -1, -1, -1, -1, -1 },
{ -1, -1, -1, -1, -1, -1, -1, -1 },
{ -1, -1, istr_psrlw, -1, istr_psraw, -1, istr_psllw, -1 },
{ -1, -1, istr_psrld, -1, istr_psrad, -1, istr_pslld, -1 },
{ -1, -1, istr_psrlq, -1, -1, -1, istr_psllq, -1 },
{ istr_fxsave,istr_fxrstor,istr_ldmxcsr,istr_stmxcsr,-1, -1, -1, -1 },
{ istr_prefetchnta,istr_prefetch0,istr_prefetch1,istr_prefetch2,-1,-1, -1, -1 }
}Definition at line 139 of file x86dasm.cpp. Referenced by INSTPROCDECL(). |
|
|
Definition at line 162 of file x86dasm.cpp. Referenced by inst_init(), and INSTPROCDECL(). |
|
|
Definition at line 161 of file x86dasm.cpp. Referenced by inst_init(). |
|
|
Definition at line 160 of file x86dasm.cpp. Referenced by InstructionDecoder::Decode(), inst_init(), and InstructionDecoder::mod_reg2(). |
|
|
Definition at line 47 of file x86dasm.cpp. |
|
|
Definition at line 158 of file x86dasm.cpp. Referenced by InstructionDecoder::mod_reg2(). |
|
|
Definition at line 44 of file x86dasm.cpp. Referenced by inst_init(). |
|
|
Definition at line 43 of file x86dasm.cpp. Referenced by inst_init(). |
|
|
Definition at line 165 of file x86dasm.cpp. Referenced by InstructionDecoder::Decode(), inst_init(), INSTPROCDECL(), and InstructionDecoder::mod_reg2(). |
|
|
Definition at line 163 of file x86dasm.cpp. Referenced by InstructionDecoder::Decode(), inst_init(), INSTPROCDECL(), and InstructionDecoder::mod_reg2(). |
1.2.15