---

x86dasm.cpp

Go to the documentation of this file.

/*
PeRdr - PE file disassembler
Copyright (C) 1999-2003 Frediano Ziglio
-----

This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-----

INFORMATION
  www: https://freddy77.tripod.com/perdr/
  e-mail: freddy77@angelfire.com
*/
#include "global.h"
#ifdef HAVE_HDRSTOP
#pragma hdrstop
#endif

#include <cstring>
#include "x86dasm.h"
#include "x86istr.h"
#include "x86table.h"
#include "utils/compilecheck.hpp"

// some bit utils (derived from bdf)
#define U8TOI(num)  (((num)^0x80)-0x80)
#define U16TOI(num) (((num)^0x8000)-0x8000)

#define IsRelocation(addr) \
  (reloc.GetRelocation(addr)!=NULL)

int     segment_mode  = 386;
int     segment_bytes = 4;    // 2 for 286 mode

// enable PentiumIII instructions
bool p3enable = true;
// enable 3DNow instructions
bool k6_3DNow_enable = true;
// enable 3DNow enhanched instructions
bool k6_en_3DNow_enable = true;
// enable Athlon instructions
bool athlon_enable = true;

#ifdef DEBUG
  static int mmx = 0;
  static int xmm = 0; // SIMD Floating-point
#endif

#define SUCC(n,m) (REG(n)+1) == REG(m)
COMPILE_CHECK(iRegCheck,
  SUCC(al,cl)     && SUCC(cl,dl)     && SUCC(dl,bl)     && SUCC(bl,ah) &&
  SUCC(ah,ch)     && SUCC(ch,dh)     && SUCC(dh,bh)     && SUCC(bh,ax) &&
  SUCC(ax,cx)     && SUCC(cx,dx)     && SUCC(dx,bx)     && SUCC(bx,sp) &&
  SUCC(sp,bp)     && SUCC(bp,si)     && SUCC(si,di)     && SUCC(di,eax) &&
  SUCC(eax,ecx)   && SUCC(ecx,edx)   && SUCC(edx,ebx)   && SUCC(ebx,esp) &&
  SUCC(esp,ebp)   && SUCC(ebp,esi)   && SUCC(esi,edi)   && SUCC(edi,mm0) &&
  SUCC(mm0,mm1)   && SUCC(mm1,mm2)   && SUCC(mm2,mm3)   && SUCC(mm3,mm4) &&
  SUCC(mm4,mm5)   && SUCC(mm5,mm6)   && SUCC(mm6,mm7)   && SUCC(mm7,xmm0) &&
  SUCC(xmm0,xmm1) && SUCC(xmm1,xmm2) && SUCC(xmm2,xmm3) && SUCC(xmm3,xmm4) &&
  SUCC(xmm4,xmm5) && SUCC(xmm5,xmm6) && SUCC(xmm6,xmm7)
);
COMPILE_CHECK(segRegCheck,
  SUCC(es,cs) && SUCC(cs,ss) && SUCC(ss,ds) &&
  SUCC(ds,fs) && SUCC(fs,gs)
);
COMPILE_CHECK(fpRegCheck,
  SUCC(st0,st1)   && SUCC(st1,st2)   && SUCC(st2,st3)   && SUCC(st3,st4) &&
  SUCC(st4,st5)   && SUCC(st5,st6)   && SUCC(st6,st7)
);
COMPILE_CHECK(controlRegCheck,
  SUCC(cr0,cr1)   && SUCC(cr1,cr2)   && SUCC(cr2,cr3)   && SUCC(cr3,cr4) &&
  SUCC(cr4,cr5)   && SUCC(cr5,cr6)   && SUCC(cr6,cr7)   && SUCC(cr7,dr0) &&
  SUCC(dr0,dr1)   && SUCC(dr1,dr2)   && SUCC(dr2,dr3)   && SUCC(dr3,dr4) &&
  SUCC(dr4,dr5)   && SUCC(dr5,dr6)   && SUCC(dr6,dr7)   && SUCC(dr7,tr0) &&
  SUCC(tr0,tr1)   && SUCC(tr1,tr2)   && SUCC(tr2,tr3)   && SUCC(tr3,tr4) &&
  SUCC(tr4,tr5)   && SUCC(tr5,tr6)   && SUCC(tr6,tr7)
);
#undef SUCC

#define _REAL_GETREGS(n,m)     ((reg_t)(REG(al)+(((n)*8)+(m))))
#define _REAL_GETSEGREGS(n)    ((reg_t)(REG(es)+(n)))
#define _REAL_GETFPREGS(n)     ((reg_t)(REG(st0)+(n)))
#define _REAL_GETCTRLREGS(n,m) ((reg_t)(REG(cr0)+(((n)*8)+(m))))

#ifdef DEBUG
static reg_t DebugGetRegs(int n,int m)
{
  _PRG_ASSERT(n >= 0 && n < 5 && m >= 0 && m < 8);
  return _REAL_GETREGS(n,m);
}
static reg_t DebugGetSegRegs(int n)
{
  _PRG_ASSERT(n >= 0 && n < 6);
  return _REAL_GETSEGREGS(n);
}
static reg_t DebugGetFpRegs(int n)
{
  _PRG_ASSERT(n >= 0 && n < 8);
  return _REAL_GETFPREGS(n);
}
static reg_t DebugGetCtrlRegs(int n,int m)
{
  _PRG_ASSERT(n >= 0 && n < 3 && m >= 0 && m < 8);
  return _REAL_GETCTRLREGS(n,m);
}
#  define GETREGS(n,m)     DebugGetRegs(n,m)
#  define GETSEGREGS(n)    DebugGetSegRegs(n)
#  define GETFPREGS(n)     DebugGetFpRegs(n)
#  define GETCTRLREGS(n,m) DebugGetCtrlRegs(n,m)
#else
#  define GETREGS(n,m)     _REAL_GETREGS(n,m)
#  define GETSEGREGS(n)    _REAL_GETSEGREGS(n)
#  define GETFPREGS(n)     _REAL_GETFPREGS(n)
#  define GETCTRLREGS(n,m) _REAL_GETCTRLREGS(n,m)
#endif

static const reg_t addr_mode2[8][2] = {
  { REG(bx),REG(si) },
  { REG(bx),REG(di) },
  { REG(bp),REG(si) },
  { REG(bp),REG(di) },
  { REG(si),null_reg },
  { REG(di),null_reg },
  { REG(bp),null_reg },
  { REG(bx),null_reg }
};

static const int op_grp[16][8] = {
  {  istr_add,   istr_or,  istr_adc,  istr_sbb,  istr_and,  istr_sub,  istr_xor,   istr_cmp }, // 1
  {  istr_rol,  istr_ror,  istr_rcl,  istr_rcr,  istr_shl,  istr_shr,        -1,   istr_sar }, // 2
  { istr_test,        -1,  istr_not,  istr_neg,  istr_mul, istr_imul,  istr_div,  istr_idiv }, // 3
  {  istr_inc,  istr_dec,        -1,        -1,        -1,        -1,        -1,         -1 }, // 4
  {  istr_inc,  istr_dec, istr_call, istr_call,  istr_jmp,  istr_jmp, istr_push,         -1 }, // 5
  { istr_sldt,  istr_str, istr_lldt,  istr_ltr, istr_verr, istr_verw,        -1,         -1 }, // 6
  { istr_sgdt, istr_sidt, istr_lgdt, istr_lidt, istr_smsw,        -1, istr_lmsw,istr_invlpg }, // 7
  {        -1,        -1,        -1,        -1,   istr_bt,  istr_bts,  istr_btr,   istr_btc }, // 8
  {        -1, istr_cmpxchg8b,   -1,        -1,        -1,        -1,        -1,         -1 }, // 9
  {        -1,        -1,        -1,        -1,        -1,        -1,        -1,         -1 }, // 10
  {        -1,        -1,        -1,        -1,        -1,        -1,        -1,         -1 }, // 11
  {        -1,        -1,  istr_psrlw,      -1,  istr_psraw,      -1,  istr_psllw,       -1 }, // 12
  {        -1,        -1,  istr_psrld,      -1,  istr_psrad,      -1,  istr_pslld,       -1 }, // 13
  {        -1,        -1,  istr_psrlq,      -1,        -1,        -1,  istr_psllq,       -1 }, // 14
  { istr_fxsave,istr_fxrstor,istr_ldmxcsr,istr_stmxcsr,-1,        -1,        -1,         -1 }, // 15
  { istr_prefetchnta,istr_prefetch0,istr_prefetch1,istr_prefetch2,-1,-1,     -1,         -1 }  // 16
};

static const int rm_size_invalid = 5;

static int  over_seg     = -1;      /*   -1  = No overiding segment yet      */
static bool over_opsize  = false;   /* false = No overiding operand size yet */
static bool over_adrsize = false;   /* false = No overiding address size yet */
static bool size_large   = true;
static bool addr_large   = true;    /* Special Addressing Modes              */
static int  size_bytes   = 4;       /* Default DWORD size                     */
       int  addr_bytes   = 4;       /* Default DWORD size                     */

// !!! replace all entry in x86table with true registry !!!
static reg_t get_regnum(int reg)
{
  if ( reg < 9 )         /* Byte sized half register */
    return GETREGS(0,reg-1);

  if ( reg < 17 )        /* Word/DWord sized general register */
  {
    if ( size_large )
      return GETREGS(2,reg-9);
    return GETREGS(1,reg-9);
  }

  return GETSEGREGS(reg-17);
}

// !!! should be a class constructor
static void inst_init()
{
    over_seg     = -1;              /* Setup for the next instruction */
    over_opsize  = false;
    over_adrsize = false;

    if ( segment_mode == 386 ) {
        size_large = true;
        addr_large = true;
    } else {
        size_large = false;
        addr_large = false;
    }
    size_bytes = segment_bytes;
    addr_bytes = segment_bytes;
}

bool InstructionDecoder::get_checkc( uint32_t* offset )
{
  if ( IsRelocation( reader->Tell() ) )
    return true; // Must be no labels or fixups
        *offset = reader->ReadByte();
        return false;
}

uint32_t InstructionDecoder::ReadVar( int flag )
{
    if ( flag )
      return reader->ReadDword();;
                return reader->ReadWord();
}

bool InstructionDecoder::getv_rel( Param& param, int flag )
{
  uint32_t value;
        const Relocation *rel;
  if (flag)
  {
                rel = reloc.GetRelocation(reader->Tell(),4);
    if (rel == &RelocationInfos::relError)
      return true;
                value = reader->ReadDword();
  }
  else
  {
                rel = reloc.GetRelocation(reader->Tell(),2);
    if (rel == &RelocationInfos::relError)
      return true;
                value = reader->ReadWord();
  }
        param.relocation = rel;
  param.literal = value;
  return false;
}

#define INSTPROCDECL(name) \
  int InstructionDecoder::name(InstructionDecoder* _this, uchar opcode, int special, Instruction& instruction)

#ifdef __BORLANDC__
#pragma argsused
#endif
// Ritorna sempre 0, condizione di errore
INSTPROCDECL(stub)
{
  return 0;
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(conv_byte)
{
  _PRG_ASSERT( opcode == 0x98 || opcode == 0x99 );
        instruction.numArg = 0;
  if ( size_large )
    instruction.instruction = special;
  return 1;
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(one_byte)
{
        instruction.numArg = 0;
  if (special != regNone)
  {
        instruction.numArg = 1;
        instruction.Args[0] = Param(Param::Registry,get_regnum(special));
  }
  return 1;
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(two_byte)
{
  uint32_t offset;

  if ( _this->get_checkc( &offset ) ) {
    return( 0 );
  }

  instruction.numArg = 1;
  if (special != regNone)
  {
        instruction.numArg = 2;
        instruction.Args[0] = Param(Param::Registry,get_regnum(special));
  }

  // unsigned byte
        instruction.Args[instruction.numArg-1] = Param(Param::Literal,offset,(uchar)1);

  return 2;
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(two_sbyte)
{
  uint32_t offset;
  int num;

  if ( _this->get_checkc( &offset ) )
    return 0;

  num = U8TOI(offset);

  instruction.numArg = 1;

  // signed byte
        instruction.Args[instruction.numArg-1] = Param(Param::Literal,num,(uchar)1);

  return 2;
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(three_byte)
{
  instruction.numArg = 1;
  if (special != regNone)
  {
          instruction.numArg = 2;
    instruction.Args[0] =
        Param(Param::Registry,get_regnum(special));
  }
  Param& cParam = instruction.Args[instruction.numArg-1];

  bool size_tmp = size_large;
  if ( opcode == 0xC2 || opcode == 0xCA ) {       /* <RET jjkk>/<RETF jjkk> */
    size_tmp = false;
  }
  int result = (size_tmp?5:3);

  cParam = Param(Param::Literal,0,(uchar)(result-1) );
  if ( _this->getv_rel( cParam, size_tmp ) )
    return 0;

  return result;
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(five_byte)
{
  uint32_t offset;
  uint32_t segment;
  int     data_size;

//  if ( over_seg != -1 ) {         // No segment overide allowed
//    return(0);
//  }

  data_size = size_bytes;

  // !!! check relocation
  offset = _this->ReadVar( size_large );
        segment = _this->reader->ReadWord();

  instruction.numArg = 1;
  instruction.Args[0] =
    Param(Param::FarLiteral,offset,(uchar)data_size,segment);

  return( 3 + data_size );
}


#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(one_a)
{
        instruction.numArg = 1;

  instruction.Args[0] =
                Param(Param::Registry,GETREGS(size_large?2:1,0));
  if (special != regNone)
  {
        instruction.numArg = 2;
        instruction.Args[1] =
        Param(Param::Registry,get_regnum(special));
  }

  return 1;
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(two_a)
{
  int     size;
  uint32_t offset;

  size = (opcode & 0x01);
  if (size && size_large)
    size = 2;

  if ( _this->get_checkc( &offset ) )
    return 0;

  instruction.numArg = 2;
  instruction.Args[0] = Param(Param::Literal,offset,(uchar)1);
  _PRG_ASSERT(0<=size && size <=2);
  instruction.Args[1] = Param(Param::Registry,GETREGS(size,0));
  return 2;
}

// !!! optimize fixing constants
Param::MemoryTypes RegSizeToMemType(int reg_size)
{
  switch (reg_size)
  {
  case 0: return Param::memInt8;
  case 1: return Param::memInt16;
  case 2: return Param::memInt32;
  case 3: return Param::memMmx;
  case 4: return Param::memXmm;
  default:
    _PRG_ASSERT(0);
    return Param::memNone;
  }
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(three_a)
{
  int                dir;
  int                reg_size;
  int                data_size;
  Param::MemoryTypes memType;

  instruction.numArg = 2;

  data_size = addr_bytes;

  dir  = ( opcode & 0x02 ) >> 1;
  reg_size = ( opcode & 0x01 );

  if ( reg_size == 1 && size_large )
    reg_size = 2;

  memType = RegSizeToMemType(reg_size);

        instruction.segOver = over_seg;

  if ( dir == 0 )
  {
    _PRG_ASSERT(reg_size>=0 && reg_size<=2);
        instruction.Args[0] =
        Param(Param::Registry,GETREGS(reg_size,0) );
        instruction.Args[1] =
        Param(Param::Memory,0,memType);
    instruction.Args[1].SetMemType(memType,false);
    if ( _this->getv_rel( instruction.Args[1], addr_large ) )
      return 0;
  }
  else
  {
        instruction.Args[0] =
        Param(Param::Memory,0,memType);
    instruction.Args[0].SetMemType(memType,false);
    if ( _this->getv_rel( instruction.Args[0], addr_large ) )
      return 0;
    _PRG_ASSERT(reg_size>=0 && reg_size<=2);
        instruction.Args[1] =
        Param(Param::Registry,GETREGS(reg_size,0) );
  }

  return( 1 + data_size );
}


#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(in_out)
{
  int             dir;
  int             size;

  instruction.numArg = 2;

  dir  = ( opcode & 0x02 ) >> 1;
  size = ( opcode & 0x01 );

  if ( size == 1 && size_large )
    size = 2;

  if ( dir == 0 )
  {
    _PRG_ASSERT(size>=0 && size<=2);
        instruction.Args[0] =
        Param(Param::Registry,GETREGS(size,0));
        instruction.Args[1] =
        Param(Param::Registry,REG(dx));
  } else {
        instruction.Args[0] =
        Param(Param::Registry,REG(dx));
    _PRG_ASSERT(size>=0 && size<=2);
        instruction.Args[1] =
        Param(Param::Registry,GETREGS(size,0));
  }

  return 1;
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(string_byte)
{
        int                size;
  int                reg;
  Param::MemoryTypes memType;
//  uchar  bytes;

  instruction.segOver = over_seg;

  size = opcode & 0x01;
  if ( size == 1 && size_large )
  {
    size = 2;
    instruction.instruction = special;
  }

  memType = RegSizeToMemType(size);
//  bytes = (uchar)(1<<size);

  reg = 1;
  if ( addr_large )
        reg = 2;

  // !!! troppo legato alla stampa
  if (over_seg == -1)
  {
    instruction.numArg = 0;
    return 1;
  }

  switch( opcode ) {
  case 0xA4: // movsb
  case 0xA5: // movsw/d
  case 0xA6: // cmpsb
  case 0xA7: // cmpsw/d
    instruction.numArg = 2;
    _PRG_ASSERT(reg>=1 && reg<=2);
    instruction.Args[0] =
      Param(Param::Memory,GETREGS(reg,7),0,memType);
    instruction.Args[1] =
      Param(Param::Memory,GETREGS(reg,6),0,memType);
    break;
  case 0xAE: // scasb
  case 0xAF: // scasw/d
  case 0xAA: // stosb
  case 0xAB: // stosw/d
  case 0x6C: // insb
  case 0x6D: // insw/d
    instruction.numArg = 1;
    _PRG_ASSERT(reg>=1 && reg<=2);
    instruction.Args[0] =
      Param(Param::Memory,GETREGS(reg,7),0,memType);
    break;
  case 0xAC: // lodsb
  case 0xAD: // lodsw/d
  case 0x6E: // outsb
  case 0x6F: // outsw/d
    instruction.numArg = 1;
    _PRG_ASSERT(reg>=1 && reg<=2);
    instruction.Args[0] =
      Param(Param::Memory,GETREGS(reg,6),0,memType);
    break;
  default:
    _PRG_ASSERT(0);
    break;
  }
  return 1;
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(enter)
{
  uint32_t num_bytes;
  uint32_t nest_level;

  // !!! check for no relocation
        num_bytes = _this->reader->ReadWord();

  if ( _this->get_checkc( &nest_level) )
    return 0;

  instruction.numArg = 2;
  _PRG_ASSERT(instruction.instruction == istr_enter);

  instruction.Args[0] = Param(Param::Literal,num_bytes, (uchar)2);
  instruction.Args[1] = Param(Param::Literal,nest_level,(uchar)1);
  return 4;
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(two_bcd)
{
  uint32_t offset;

  // niente rilocazioni
  if ( _this->get_checkc( &offset ) )
    return 0;

  if ( offset == 10 )
  {
    instruction.numArg = 0;
    return 2;
  }

  instruction.numArg = 1;
  instruction.Args[0] = Param(Param::Literal,offset,(uchar)1);
  return 2;
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(disp8)
{
  uint32_t offset;
  uint32_t dest;

//    if ( over_seg != -1 ) {             /* No segment overide allowed */
//        return( 0 );
//    }

  instruction.numArg = 1;

  // !!! check relocation
        offset = _this->reader->ReadByte();

//    if ( offset == 0xFFFFFFFFL ) {      /* This would generate a label in  */
//        return( 0 );                    /* the middle of the jmp statement */
//    }                                   /* thereby preventing it anyway    */

  dest = _this->reader->Tell() + (signed char)offset;

        instruction.Args[0] =
        Param(Param::Literal,dest,(uchar)addr_bytes);

  return 2;
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(disp16)
{
  uint32_t offset;
  uint32_t dest;
  int             data_size;

  instruction.numArg = 1;

  data_size = addr_bytes;

//    if ( over_seg != -1 )               /* No segment overide allowed */
//        return( 0 );

  // !!! check relocation
  offset = _this->ReadVar( addr_large );

  // translate 16 to 32
  if ( !addr_large )
    offset = U16TOI(offset);

  dest = _this->reader->Tell() + offset;

  if ( !addr_large )
    dest &= 0xFFFFlu;

        instruction.Args[0] =
        Param(Param::Literal,dest,(uchar)addr_bytes);

  return( 1 + data_size );
}


#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(wait)
{
  // !!! always print instruction
  instruction.numArg = 0;
  return 1;
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(prefix)
{
  // !!! should verify next instruction
  instruction.numArg = 0;
  return 1;
}

// special handling for Pentium III/4 instruction
#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(prefixf3)
{
  while (p3enable) // false loop
  {
    // see if next instruction can be 2 byte opcode
    uint32_t byte;

    // next byte must be 0xF
    if ( _this->get_checkc( &byte ) || byte != 0xF )
    {
      // do normal operation
      _this->reader->UnReadByte();
      break;
    }

    // read opcode
    if ( _this->get_checkc( &byte ) )
      return 0;

    // read next instruction
    instruction.instruction = F3XMM(byte).instruction;
    if (instruction.instruction == -1)
      return 0;

    // a small check_forward replacement
    // instruction ??
    int valid = mod_xmm( _this, byte, F3XMM(byte).special, instruction );

    return valid?valid+2:valid;
  }

  // !!! check forward instruction, should be a string instruction
  instruction.numArg = 0;
  return 1;
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(seg_over)
{
  int             valid;
  int             save_seg; // !!! serve salvarlo ??

  save_seg = over_seg;

  // puo' essere computato direttamente con special
  if ( opcode >= 0x64 ) {
    over_seg = 4 + opcode - 0x64;
    _PRG_ASSERT(over_seg >= 4 && over_seg < 6);
  } else {
    over_seg = (opcode & 0x18) >> 3;
    _PRG_ASSERT(over_seg >= 0 && over_seg < 4);
  }

  valid = _this->check_forward( instrTable, instruction );

  over_seg = save_seg;
  if ( valid )
    return( valid+1 );
  else
    return( 0 );
}


#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(opsize_over)
{
  int             valid;
  int             save_bytes;
  bool            save_large;

  save_large = size_large;
  save_bytes = size_bytes;

  if (!over_opsize)  // already override, nothing to do
  {
    size_large = !size_large;       /* Toggle size */
    if ( size_bytes == 2 ) {
      size_bytes = 4;
    } else {
      size_bytes = 2;
    }
    over_opsize = true;
  }

  valid = _this->check_forward( instrTable, instruction );

  size_large = save_large;
  size_bytes = save_bytes;
  over_opsize = false;  // always set to false

  if ( valid )
    return( valid+1 );
  else
    return( 0 );
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(adrsize_over)
{
  int             valid;
  int             save_bytes;
  bool            save_large;

  save_large = addr_large;
  save_bytes = addr_bytes;

  if (!over_adrsize)
  {
    addr_large = !addr_large;           /* Toggle address */
    if ( addr_bytes == 2 ) {
      addr_bytes = 4;
    } else {
      addr_bytes = 2;
    }
    over_adrsize = true;
  }

  valid = _this->check_forward( instrTable, instruction );

  addr_large = save_large;
  addr_bytes = save_bytes;
  over_adrsize = false;

  if ( valid )
    return( valid+1 );
  else
    return( 0 );
}

int InstructionDecoder::do_sib( uchar* base, Param& param )
{
    uint32_t sib_byte;
    int             ss;
    int             idx;

    if ( get_checkc ( &sib_byte ) )
      return( -1 );
    ss    = (int)(sib_byte & 0xC0L) >> 6;
    idx   = (int)(sib_byte & 0x38L) >> 3;
    *base = (uchar)(sib_byte & 0x07L);
    if ( idx == 0x04 ) {            /* For special [ESP] */
    // assume codifica fissa, tolto
//      if ( ss != 0 ) {
//        return( -1 );
//      } else {
//        strcpy( text, "" );
//      }
    } else
    {
        param.mem_reg2 = GETREGS(2,idx);
      param.factor   = (uchar)(1<<ss);
    }
    return 1;
}


int InstructionDecoder::mod0( int sib_offset, uchar r_m, bool* size_known, Param& param )
{
  int      result;

  if ( (r_m == 6 && !addr_large) || (r_m == 5 && addr_large) ) {

    // !!! segmento mettere in instruction
    param = Param(Param::Memory,null_reg,param.mem_reg2,0,param.factor);
    if ( getv_rel( param, addr_large ) )
      return -1;

    result = addr_bytes+sib_offset;
    *size_known = false;
    return( result );
  }
  if ( addr_large ) {
    param = Param(Param::Memory,GETREGS(2,r_m),param.mem_reg2,0,param.factor);
  } else {
        param = Param(Param::Memory,addr_mode2[r_m][0],addr_mode2[r_m][1],0,1 );
  }
  result = sib_offset;
  *size_known = true;
  return( result );
}

int InstructionDecoder::mod1( int sib_offset, uchar r_m, Param& param )
{
    uint32_t offset;
    int      result;

    // read no relocation byte
    if ( get_checkc( &offset ) )
        return -1;

    // byte to dword
    offset = U8TOI(offset);

    if ( addr_large ) {
      param = Param(Param::Memory,GETREGS(2,r_m),param.mem_reg2,offset,param.factor);
    } else {
                param = Param(Param::Memory,addr_mode2[r_m][0],addr_mode2[r_m][1],offset,1 );
    }

    result = 1 + sib_offset;
    return( result );
}

int InstructionDecoder::mod2( int sib_offset, uchar r_m, bool* size_known, Param& param )
{
    int      result;

        // e chi se ne importa se l'assembler non e' ottimizzato ?
//      if ( offset == 0x00000000L ) {
//        return( -1 );       /* Assembler should have optimized */
//      }
    if ( addr_large ) {
      param = Param(Param::Memory,GETREGS(2,r_m),param.mem_reg2,0,param.factor);
    } else {
      param = Param(Param::Memory,addr_mode2[r_m][0],addr_mode2[r_m][1],0,1 );
    }
    if ( getv_rel( param, addr_large ) )
      return -1;
    result = addr_bytes+sib_offset;
    *size_known = true;
    return( result );
}


static int mod3( uchar r_m, int size, Param& param )
{
  if (unsigned(size)>4u) // 0-4 valid
    return -1;
  param = Param(Param::Registry,GETREGS(size,r_m));
  return 0;
}

int InstructionDecoder::do_mod_rm( uchar mod, uchar r_m, int reg_size, Param::MemoryTypes memType, bool size_needed, Param& param )
{
    bool            size_known;
    int             sib_offset;
    int             result;

    _PRG_ASSERT(reg_size != 3 || mmx);
    _PRG_ASSERT(reg_size != 4 || xmm);

    if (mod == 3) // registry case
    {
        return mod3( r_m, reg_size, param );
    }

    size_known = false;

    sib_offset = 0;

    if ( addr_large )
    {
        // set default value for sib
        param.mem_reg2 = null_reg;
      param.factor = 1;
      if ( r_m == 4 && mod != 3 ) {
        /* Get result and new r_m */
        sib_offset = do_sib( &r_m, param );
        if ( sib_offset == -1 ) {
          return( -1 );
        }
      }
    }
    switch( mod ) {
        case 0: result = mod0( sib_offset, r_m, &size_known, param );
                break;
        case 1: result = mod1( sib_offset, r_m, param );
                size_known = true;
                break;
        default:
                // no warning and a bit optimized
                _PRG_ASSERT(0);
        case 2: result = mod2( sib_offset, r_m, &size_known, param );
                break;
    }

    if ( result != -1 ) {
        /*
        ** If the size is already known, then we don't need 'xxxx' ptr text
        */
//        if ( !size_known || size_needed )
        {
                param.SetMemType( memType, size_needed );
        }
    }
    return( result );
}

#ifdef __BORLANDC__
#pragma argsused
#endif
int InstructionDecoder::mod_reg2 ( uchar opcode, int special, int mod_reg, Instruction& instruction)
{
  uchar              mod;
  uchar              r_m;
  uchar              reg;
  int                reg_size;
  int                rm_size;
  int                additional = 0;
        Param              *reg_param;
  Param              *mem_param;
  Param::MemoryTypes memType;

  mod = (uchar)((mod_reg & 0xC0) >> 6);
  reg = (uchar)((mod_reg & 0x38) >> 3);
  r_m = (uchar)((mod_reg & 0x07) >> 0);

  reg_size = special & modregSize;
  COMPILE_CHECK(varTypes,(modregVar == 1) && (modregMmx == 3) && (modregXmm == 4));
  if (reg_size == modregVar && size_large )
    reg_size = 2;
#ifdef DEBUG
  _PRG_ASSERT(mmx == 0 && xmm == 0);
  if (reg_size == modregMmx)
    ::mmx = 1;
  if (reg_size == modregXmm)
    ::xmm = 1;
#endif

  // !!! se size_needed e punta a registro errore (es LDS)
  bool size_needed = false;

  if ( (special&modregMemType) == 0 )
  {
    rm_size = reg_size;
    memType = RegSizeToMemType(reg_size);
  }
  else
  {
    size_needed = true;
    switch (special&modregMemType)
    {
    case modregMemByte:
      rm_size = 0;
      memType  = Param::memInt8;
      break;
    case modregMemWord:
      rm_size = 1;
      memType  = Param::memInt16;
      break;
    case modregMemDword:
      _PRG_ASSERT( (::mmx && reg_size == modregMmx) 
        || (::xmm && reg_size == modregXmm) );
      rm_size = 2;
      memType  = Param::memInt32;
      break;
    case modregMemQword:
      _PRG_ASSERT(::xmm == 0);
      _PRG_ASSERT(instruction.instruction==istr_cmpxchg8b);
      rm_size = rm_size_invalid;
      memType  = Param::memInt64;
      break;
    case modregMemFPacket:
#ifdef DEBUG
      ::xmm = 1;
#endif
      rm_size = 4;
      memType = Param::memFPFloat32;
      break;
    case modregMem2FPacket:
#ifdef DEBUG
      ::xmm = 1;
#endif
      rm_size = 4;
      memType = Param::memSemiXmm;
      break;
    case modregMem4FPacket:
#ifdef DEBUG
      ::xmm = 1;
#endif
      rm_size = 4;
      memType = Param::memXmm;
      break;
    case modregMemPacket:
      _PRG_ASSERT(instruction.instruction==istr_pextrw 
                          || instruction.instruction==istr_pmovmskb 
        || instruction.instruction==istr_cvtpi2ps);
#ifdef DEBUG
      if (instruction.instruction==istr_cvtpi2ps) ::xmm = 1; else ::mmx = 1;
#endif
      rm_size = (instruction.instruction==istr_cvtpi2ps)?4:3;
      memType  = Param::memMmx;
      break;
    case modregMemPacketDword:
      _PRG_ASSERT(::mmx && reg_size == modregMmx);
      rm_size = (mod==3)?3:2;
      memType  = Param::memInt32;
      break;
    case modregMemDescriptor: 
            rm_size = rm_size_invalid; 
            memType = Param::memDescriptor;
            break; // 16&32 bit
    case modregMemPointer:
      _PRG_ASSERT(::xmm == 0);
      rm_size = rm_size_invalid;
      memType  = size_large?Param::memFarPointer32:Param::memFarPointer16;
      break;
    case modregMemBound:
      _PRG_ASSERT(::xmm == 0);
      rm_size = rm_size_invalid;
      memType  = size_large?Param::memBound32:Param::memBound32;
      break;
    default:
      // no warning and small optimization
      _PRG_ASSERT(0);
    case modregMemNone:
      rm_size = rm_size_invalid;
      memType  = Param::memNone;
      break;
    }
  }

  // write first 2 arguments
  switch ( special&modregType )
  {
  case modregMemReg:
        instruction.numArg = 2;
        mem_param = &instruction.Args[0];
        reg_param = &instruction.Args[1];
    break;
  case modregRegMem:
        instruction.numArg = 2;
        reg_param = &instruction.Args[0];
        mem_param = &instruction.Args[1];
    break;
  case modregMem:
        instruction.numArg = 1;
        mem_param = &instruction.Args[0];
    reg_param = NULL;
    break;
  default:
    // non dovrebbe capitare ma non si sa mai
    _PRG_ASSERT(0);
  case modregReg:
        instruction.numArg = 1;
        reg_param = &instruction.Args[0];
    mem_param = NULL;
    break;
  }

  if ( reg_param != NULL )
  {
    _PRG_ASSERT(reg_size>=0 && reg_size<=4);
        *reg_param = Param(Param::Registry,GETREGS(reg_size,reg));
  }
  else
    // !!! non sempre la dimensione serve se non c'e' un registro, a volte
    // e' implicita nell' operazione
    size_needed = true;

  if ( mem_param != NULL )
  {
    instruction.segOver = over_seg;
    additional = do_mod_rm( mod, r_m, rm_size, memType, size_needed, *mem_param );
#ifdef DEBUG
    ::mmx = 0;
    ::xmm = 0;
#endif
    if ( additional == -1 )
      return 0;
  }
#ifdef DEBUG
  ::mmx = 0;
  ::xmm = 0;
#endif

  // process third parameters (if one)
  if ( special&modregThird )
  {
        uint32_t data;
    Param& tParam = instruction.Args[instruction.numArg];
    switch ( special&modregThird )
    {
    case modregIsb:
      // check no relocation
        if ( get_checkc( &data ) )
        return 0;
      data = U8TOI(data);
      ++additional;
      tParam = Param(Param::Literal,data,(uchar)1);
      break;
    case modregIub:
      // check no relocation
        if ( get_checkc( &data ) )
        return 0;
      ++additional;
      tParam = Param(Param::Literal,data,(uchar)1);
      break;
    case modregIv:
      _PRG_ASSERT( size_bytes == (size_large?4:2) );
        tParam = Param(Param::Literal,0,(uchar)size_bytes);
      if ( getv_rel( tParam, size_large ) )
        return 0;
      additional += size_bytes;
      break;
    case modreg1:
        tParam = Param(Param::Literal,1,(uchar)1);
      break;
    case modregCL:
        tParam = Param(Param::Registry,REG(cl));
      break;
    }
    ++instruction.numArg;
  }

  return 2+additional;
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(mod_reg)
{
  uint32_t mod_reg;
  if ( _this->get_checkc( &mod_reg ) )
    return 0;

  return _this->mod_reg2( opcode,special,mod_reg, instruction);
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(mod_reg_p3)
{
  uint32_t mod_reg;
  uchar mod;

  // verify PentiumIII or Athlon
  if (!p3enable && !athlon_enable)
    return 0;

  if ( _this->get_checkc( &mod_reg ) )
    return 0;

  mod = (uchar)((mod_reg & 0xC0) >> 6);

  switch (instruction.instruction)
  {
  case istr_pextrw:
    _PRG_ASSERT(opcode == 0xC5);
  case istr_pmovmskb:
    _PRG_ASSERT(instruction.instruction != istr_pmovmskb || opcode == 0xD7);
  case istr_maskmovq:
    _PRG_ASSERT(instruction.instruction != istr_maskmovq || opcode == 0xF7);
    // solo registri
    if (mod != 3)
      return 0;
    break;
  case istr_pinsrw:
    _PRG_ASSERT(special == modregPqEdIub);
    _PRG_ASSERT(opcode == 0xC4);
    // memoria , in questo caso i parametri sono diversi
    if (mod != 3)
      special = modregPqEwIub;
    break;
  }

  return _this->mod_reg2 (opcode,special,mod_reg, instruction);
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(mod_xmm)
{
  _PRG_ASSERT(instruction.instruction != -1);

  // verifica PentiumIII abilitato
  if (!p3enable)
    return 0;

  uint32_t mod_reg;
  if ( _this->get_checkc( &mod_reg ) )
    return 0;

  // movhlps and movlhps renaming
  if ( (opcode|4) == 0x16 && (mod_reg & 0xC0) == 0xC0 ) // 0x12 or 0x16 and registry
  {
    instruction.instruction = istr_movlhps;
    if (opcode == 0x12) 
      instruction.instruction = istr_movhlps;
  }

  return _this->mod_reg2( opcode,special,mod_reg, instruction);
}

// mov seg_reg,reg/mem  mov reg/mem,seg_reg
#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(seg_reg)
{
  uint32_t mod_reg;
  uchar  mod;
  uchar  r_m;
  uchar  reg;
  int    additional;
        Param *reg_param;
  Param *mem_param;

  if ( _this->get_checkc( &mod_reg ) )
    return 0;

  instruction.numArg = 2;

  mod = (uchar)((mod_reg & 0xC0) >> 6);
  reg = (uchar)((mod_reg & 0x38) >> 3);
  r_m = (uchar)((mod_reg & 0x07) >> 0);

  // write first 2 arguments
  switch ( special&modregType )
  {
  case modregMemReg:
        mem_param = &instruction.Args[0];
        reg_param = &instruction.Args[1];
    break;
  default:
       // no warning and small optimization
    _PRG_ASSERT(0);
  case modregRegMem:
        reg_param = &instruction.Args[0];
        mem_param = &instruction.Args[1];
    break;
  }

  // check reg value
  if (reg >=6)
        return 0;

  *reg_param = Param(Param::Registry,GETSEGREGS(reg));

  instruction.segOver = over_seg;
  additional = _this->do_mod_rm( mod, r_m, 1, Param::memInt16,false, *mem_param );
  if ( additional == -1 )
    return 0;

  return 2+additional;
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(group1)
{
  uint32_t mod_reg;
  if ( _this->get_checkc( &mod_reg ) )
    return 0;

  instruction.instruction = op_grp[0][(uchar)((mod_reg & 0x38) >> 3)];
  return _this->mod_reg2( opcode,special,mod_reg, instruction);
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(group2)
{
  uint32_t mod_reg;
  if ( _this->get_checkc( &mod_reg ) )
    return 0;

  instruction.instruction = op_grp[1][(uchar)(((int)mod_reg & 0x38) >> 3)];
  if (instruction.instruction == -1)
    return 0;

  return _this->mod_reg2( opcode,special,mod_reg, instruction);
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(group3)
{
  uint32_t mod_reg;
  uchar reg;

  if ( _this->get_checkc( &mod_reg ) )
    return 0;
  reg = (uchar)(((int)mod_reg & 0x38) >> 3);

  // verifica istruzione test
  if (reg == 0)
  {
    // test
    if ( (special&modregSize) == modregByte )
      special |= modregIub;
    else
    {
      _PRG_ASSERT( (special&modregSize) == modregVar );
      special |= modregIv;
    }
  }
  instruction.instruction = op_grp[2][reg];
  if (instruction.instruction == -1)
    return 0;

  return _this->mod_reg2( opcode,special,mod_reg, instruction);
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(group4)
{
  uint32_t mod_reg;
  if ( _this->get_checkc( &mod_reg ) )
    return 0;

  instruction.instruction = op_grp[3][(uchar)(((int)mod_reg & 0x38) >> 3)];
  if (instruction.instruction == -1)
    return 0;

  return _this->mod_reg2( opcode,special,mod_reg, instruction);
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(group5)
{
  uint32_t mod_reg;
  uchar reg;

  if ( _this->get_checkc( &mod_reg ) )
    return 0;
  reg = (uchar)(((int)mod_reg & 0x38) >> 3);

  // verifica istruzione test
  if ( (reg==3) || (reg==5) )
    special = modregEp; // !!! Mp

  instruction.instruction = op_grp[4][reg];
  if (instruction.instruction == -1)
    return 0;

  return _this->mod_reg2( opcode,special,mod_reg, instruction);
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(group6)
{
  uint32_t mod_reg;
  if ( _this->get_checkc( &mod_reg ) )
    return 0;

  instruction.instruction = op_grp[5][(uchar)(((int)mod_reg & 0x38) >> 3)];
  if (instruction.instruction == -1)
    return 0;

  return _this->mod_reg2( opcode,special,mod_reg, instruction);
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(group7)
{
  uint32_t mod_reg;
  uchar reg;

  if ( _this->get_checkc( &mod_reg ) )
    return 0;
  reg = (uchar)(((int)mod_reg & 0x38) >> 3);

  // calcola parametri
  if ( reg == 7 )
    special = modregMn; // pointer to no memory
  else if (reg >= 4)
    special = modregEw;

  instruction.instruction = op_grp[6][reg];
  if (instruction.instruction == -1)
    return 0;

  return _this->mod_reg2( opcode,special,mod_reg, instruction);
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(group8)
{
  uint32_t mod_reg;
  if ( _this->get_checkc( &mod_reg ) )
    return 0;

  instruction.instruction = op_grp[7][(uchar)(((int)mod_reg & 0x38) >> 3)];
  if (instruction.instruction == -1)
    return 0;

  return _this->mod_reg2( opcode,special,mod_reg, instruction);
}

INSTPROCDECL(group9)
{
  uint32_t mod_reg;
  if ( _this->get_checkc( &mod_reg ) )
    return 0;

  instruction.instruction = op_grp[8][(uchar)(((int)mod_reg & 0x38) >> 3)];
  if (instruction.instruction == -1)
    return 0;

  return _this->mod_reg2( opcode,special,mod_reg, instruction);
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(groupA)
{
  _PRG_ASSERT( opcode >= 0x71 && opcode <= 0x73 );
  uint32_t mod_reg;
  int size = opcode - (0x71 - 11);
  _PRG_ASSERT( size >= 11 && size <= 13); // dal gruppo 12 al 14
  uchar reg;

  if ( _this->get_checkc( &mod_reg ) )
    return 0;
  reg = (uchar)(((int)mod_reg & 0x38) >> 3);

  if ( (instruction.instruction=op_grp[size][reg]) == -1 )
    return 0;

  return _this->mod_reg2( opcode,special,mod_reg, instruction);
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(group15)
{
  uint32_t mod_reg;
  uchar reg;
  uchar mod;
  uchar r_m;

  // check PentiumIII or Athlon enabled
  if (!p3enable && !athlon_enable)
    return 0;

  if ( _this->get_checkc( &mod_reg ) )
    return 0;

  // check for sfence
  if ( mod_reg == 0xF8 )
  {
    instruction.instruction = istr_sfence;
    instruction.numArg = 0;
    return 2;
  }

  // Athlon support only sfence
  if (!p3enable)
    return 0;

  mod = (uchar)((mod_reg & 0xC0) >> 6);
  reg = (uchar)((mod_reg & 0x38) >> 3);
  r_m = (uchar)((mod_reg & 0x07) >> 0);

  // not registry operands
  if (mod == 3)
    return 0;

  if ( (instruction.instruction=op_grp[14][reg]) == -1 )
    return 0;
  _PRG_ASSERT(reg <= 3);

  instruction.numArg = 1;

  Param::MemoryTypes memType = Param::memInt32;
  int rm_size = 2; // !!! is registry alright ??
  if (reg < 2)
  {
    rm_size = rm_size_invalid; // invalid registry
    memType = Param::memXStatus;
  }

  int additional = _this->do_mod_rm( mod, r_m, rm_size, memType, false, instruction.Args[0] );
  if ( additional == -1 )
    return 0;

  return 2+additional;
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(group16)
{
  uint32_t mod_reg;
  uchar reg;
  uchar mod;
  uchar r_m;

  // verifica PentiumIII abilitato
  if (!p3enable)
    return 0;

  if ( _this->get_checkc( &mod_reg ) )
    return 0;

  mod = (uchar)((mod_reg & 0xC0) >> 6);
  reg = (uchar)((mod_reg & 0x38) >> 3);
  r_m = (uchar)((mod_reg & 0x07) >> 0);

  // solo memoria
  if (mod == 3)
    return 0;

  if ( (instruction.instruction=op_grp[15][reg]) == -1 )
    return 0;
  _PRG_ASSERT(reg <= 3);

  instruction.numArg = 1;

  // !!! memNone ??
  int additional = _this->do_mod_rm( mod, r_m, rm_size_invalid, Param::memInt8, false, instruction.Args[0] );
  if ( additional == -1 )
    return 0;

  return 2+additional;
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(mov_creg)
{
  _PRG_ASSERT(special>=0 && special<=5);
  int type = special>>1;
//  int b;
  uint32_t mod_reg;
  uchar creg,reg;
  Param *reg_param;
  Param *creg_param;

  if ( _this->get_checkc( &mod_reg ) )
    return 0;

  creg = (uchar)(((int)mod_reg & 0x38) >> 3);
  reg  = (uchar)(((int)mod_reg & 0x07) >> 0);

  instruction.numArg = 2;
  switch(special&1)
  {
  case 0:
    reg_param  = &instruction.Args[0];
    creg_param = &instruction.Args[1];
    break;
  default: // no silly warning
  case 1:
    creg_param = &instruction.Args[0];
    reg_param  = &instruction.Args[1];
    break;
  }
  *creg_param = Param(Param::Registry,GETCTRLREGS(type,creg));
  *reg_param  = Param(Param::Registry,GETREGS(2,reg));
  return 2;
}

// serve davvero ??
#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(mov_special)
{
//  int    b;
  uint32_t mod_reg;
  uchar  mod;
  uchar  r_m;
//  uchar  reg;
  int    reg_size;
  int    rm_size;
  int    additional;
  bool   size_needed;

  instruction.segOver = over_seg;
  instruction.numArg = 2;

  if ( _this->get_checkc( &mod_reg ) )
    return 0;

  mod = (uchar)(((int)mod_reg & 0xC0) >> 6);
//  reg = (uchar)(((int)mod_reg & 0x38) >> 3);
  r_m = (uchar)(((int)mod_reg & 0x07) >> 0);

  size_needed = true;

  reg_size = opcode & 1;
  if (reg_size && size_large)
    reg_size = 2;

  rm_size = reg_size;

  _PRG_ASSERT(rm_size>=0 && rm_size<=2);
  additional = _this->do_mod_rm( mod, r_m, rm_size, RegSizeToMemType(rm_size), size_needed, instruction.Args[0] );
  if ( additional == -1 )
    return 0;

  // leggi secondo parametro
  uint32_t offset;
  if (reg_size == 0)
  {
                offset = _this->reader->ReadByte();
    instruction.Args[1] = Param(Param::Literal,offset,(uchar)1);

    additional++;
  }
  else
  {
        instruction.Args[1] = Param(Param::Literal,0,(uchar)size_bytes);
    if ( _this->getv_rel( instruction.Args[1], size_large ) )
      return 0;
    additional += size_bytes;
  }

  return 2+additional;
}

// K6 3D Now! instruction
INSTPROCDECL(one_byte_k63d)
{
  if (!k6_3DNow_enable)
    return 0;

  return one_byte( _this, opcode,special,instruction);
}

INSTPROCDECL(prefetch_k63d)
{
  _PRG_ASSERT( opcode == 0x0E && special == 0 );

  // verifica 3DNow abilitato
  if (!k6_3DNow_enable)
    return 0;

  uint32_t mod_reg;
  uchar reg;
  uchar mod;
  uchar r_m;

  if ( _this->get_checkc( &mod_reg ) )
    return 0;

  mod = (uchar)((mod_reg & 0xC0) >> 6);
  reg = (uchar)((mod_reg & 0x38) >> 3);
  r_m = (uchar)((mod_reg & 0x07) >> 0);

  // solo memoria
  if (mod == 3)
    return 0;

  if ( reg == 1 )
    instruction.instruction = istr_prefetchw;

  // !!! usare mod_reg2 ?? e modregEb

  instruction.numArg = 1;

  int additional = _this->do_mod_rm( mod, r_m, rm_size_invalid, Param::memInt8, false, instruction.Args[0] );
  if ( additional == -1 )
    return 0;

  return 2+additional;
}

INSTPROCDECL(k6_3dnow)
{
  _PRG_ASSERT(special == modregPqQq);
  if (!k6_3DNow_enable)
    return 0;

  uint32_t mod_reg;
  if ( _this->get_checkc( &mod_reg ) )
    return 0;

  int result = _this->mod_reg2( opcode,special,mod_reg, instruction);

  // read opcode suffix
  if ( result == 0 || _this->get_checkc( &mod_reg ) )
  {
    return 0;
  }
  _PRG_ASSERT(mod_reg < 256);
  
  // get instruction
  instruction.instruction = k6_3DNow_instr[mod_reg].instruction;
  if ( instruction.instruction == -1 )
    return 0;

  // check for enhanched enabled
  if ( mod_reg == 0xBB || (mod_reg&0xF) == 0xC || (mod_reg&0xF9) == 0x80 )
  {
    _PRG_ASSERT( mod_reg==0xBB || mod_reg==0x8A || mod_reg==0x8E || mod_reg==0x0C || mod_reg==0x1C );
    if (!k6_en_3DNow_enable)
      return 0;
  }

  return 1+result;
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(esc)
{
  uint32_t mod_reg;
  int  additional;
  int  mem_size;
  bool size_needed = true;
  uchar mod;
  uchar ttt;        // Described as TTT in 80386 Prog Ref Man.
  uchar lll;        // Described as LLL in 80386 Prog Ref Man.
  uchar r_m;
  uchar esc_byte;

  if ( _this->get_checkc( &mod_reg ) )
    return 0;

  mod = (uchar)((mod_reg & 0xC0) >> 6);
  lll = (uchar)(((int)mod_reg & 0x38) >> 3);
  r_m = (uchar)(((int)mod_reg & 0x07) >> 0);

  ttt = (uchar)(opcode & 0x07);
  esc_byte = (uchar)((ttt << 3) + lll);

  if ( mod == 0x03 )
  {
    // instruction or special escape group
          int escInstr = FPIM3_ISTR(esc_inst_mod3[esc_byte]);
    instruction.numArg = 2; // default
    switch(FPIM3_PARAM(esc_inst_mod3[esc_byte]))
    {
    case fpiParamStNSt:
      instruction.Args[0] = Param(Param::Registry,GETFPREGS(r_m));
      instruction.Args[1] = Param(Param::Registry,REG(st0));
      break;
    case fpiParamStStN:
      instruction.Args[0] = Param(Param::Registry,REG(st0));
      instruction.Args[1] = Param(Param::Registry,GETFPREGS(r_m));
      break;
    case fpiParamStN:
      instruction.numArg = 1;
      instruction.Args[0] = Param(Param::Registry,GETFPREGS(r_m));
      break;
    case fpiParamNone:
      // escInstr is a special escape group
      instruction.numArg = 0;

      // is a valid group ?
      if (escInstr == -1)
        return 0;

      // get instruction
      escInstr = esc_inst_special[escInstr][r_m];

      // unico caso speciale, ax come parametro
      if (escInstr == istr_fstsw)
      {
        instruction.numArg = 1;
        instruction.Args[0] = Param(Param::Registry,REG(ax));
      }
      break;
    default:
      // non dovrebbe capitare
      _PRG_ASSERT(0);
    }
    // nessuna istruzione
    if (escInstr == -1)
      return 0;
                instruction.instruction = escInstr;
    return 2;
  }

  if ( (instruction.instruction=FPI_ISTR(esc_inst[esc_byte])) == -1 )
    return 0;

  instruction.numArg = 1;

  // calcola dimensione
  // !!! per ora non c'e' il tipo, solo la dimensione
  mem_size = FPI_TYPE(esc_inst[esc_byte]);

  if (mem_size>fpiTypeImplicitMemory)
    size_needed = false;

  // !!! eliminare switch
  Param::MemoryTypes memType;
  switch(mem_size)
  {
  case fpiTypeWord:
  case fpiTypeWInt:
    memType = Param::memInt16;
    break;
  case fpiTypeSInt:
    memType = Param::memInt32;
    break;
  case fpiTypeLInt:
    memType = Param::memInt64;
    break;
  case fpiTypeSingle:
    memType = Param::memFPFloat32;
    break;
  case fpiTypeDouble:
    memType = Param::memFPFloat64;
    break;
  case fpiTypeExtended:
    memType = Param::memFPFloat80;
    break;
  case fpiTypeBCD:
    memType = Param::memFPBCD;
    break;
  case fpiTypeEnv:
    memType = size_large? Param::memFPEnv32 : Param::memFPEnv16;
    break;
  default:
    // no warning and small optimization
    _PRG_ASSERT(0);
  case fpiTypeStatus:
    memType = size_large? Param::memFPStatus32 : Param::memFPStatus16;
    break;
  }

  additional = _this->do_mod_rm( mod, r_m, rm_size_invalid, memType, size_needed, instruction.Args[0] );
  if ( additional == -1 )
    return 0;

  return 2+additional;
}

int InstructionDecoder::check_forward( const InstTable* inst_table, Instruction& instruction )
{
    uint32_t byte;
    int      data;
    int      valid;

    // !!! too different ??
    // the next byte must be a valid instruction
    if ( get_checkc( &byte ) )
      return 0;
    data = (uchar)byte;

   instruction.instruction = inst_table[data].instruction;
   valid = inst_table[data].rtn(
              this,
              (uchar)data,
              inst_table[data].special,
              instruction );

    return valid;
}

#ifdef __BORLANDC__
#pragma argsused
#endif
INSTPROCDECL(extra)
{
  int result;

  result = _this->check_forward( exInstrTable, instruction);

  if ( result == 0 )
    return 0;
  else
    return( result+1 );
}

int InstructionDecoder::Decode(Instruction& instruction,ObjectModule::DataReader& reader)
{
        this->reader = &reader;
#ifdef DEBUG
  // marca istruzione con valori invalidi
  instruction.instruction = num_instructions;
  instruction.numArg = 20;
  // testa valori
  for(int i = 0; i<3; ++i)
  {
    _PRG_ASSERT(instruction.Args[i].relocation == NULL);
    instruction.Args[i].InitInvalid();
  }
#endif
        try
  {
        int result;
          uint32_t c;
        if ( get_checkc( &c ) )
        return 0;
                instruction.instruction = instrTable[c].instruction;
        result =
        instrTable[c].rtn( this, (uchar)c,instrTable[c].special,instruction);
#ifdef DEBUG
        // testa valori
        if (result != 0 )
        {
        _PRG_ASSERT(instruction.instruction>=0);
        _PRG_ASSERT(instruction.instruction<num_instructions);
        _PRG_ASSERT(instruction.numArg != 20);
        for(int i = 0; i<instruction.numArg; ++i)
        {
        instruction.Args[i].CheckValid();
        if ( instruction.Args[i].type == Param::t_memory )
        {
                if (instruction.instruction != istr_lea && instruction.instruction != istr_invlpg)
                _PRG_ASSERT(instruction.Args[i].GetMemSize() != 0);
        }
        }
        }
#endif
        return result;
        }
  catch(const ObjectModule::OutOfAddress&)
  {
                /* reset to default */
                over_seg = -1;
                if (over_opsize) 
                {
        size_large = !size_large;
        size_bytes = 6 - size_bytes;
                }
                if (over_adrsize)
                {
        addr_large = !addr_large;
        addr_bytes = 6 - addr_bytes;
                }
    return 0;
  }
}

// vim:tabstop=2:

---